1. Field of the Invention
The present invention relates to a substrate processing system and a substrate processing method for processing substrates, such as semiconductor wafers or LCD substrates, namely, glass substrates for LCDs, by a resist film forming process and a developing process which is carried out after an exposure process.
2. Description of the Related Art
A manufacturing process for manufacturing semiconductor devices or LCD substrates forms a circuit pattern by a photolithographic technique that forms a predetermined film on a substrate, namely, a workpiece, coats the predetermined film with a resist film by applying a liquid photoresist (hereinafter, referred to as “resist”) to the predetermined film, exposes the resist film to light in a predetermined circuit pattern and processes the exposed resist film by a developing process. This photolithographic technique forms a resist pattern corresponding to a predetermined circuit pattern by subjecting a substrate sequentially to a series of processes including a cleaning process, a dehydrating process, a baking process, an adhesion process (hydrophobicity imparting process), a resist film forming process, a prebaking process, an exposure process, a predevelopment baking process, a developing process and a postbaking process.
The series of processes is carried out by a resist pattern forming system built by connecting a resist film forming and developing system and an exposure system. A resist pattern forming system as shown in FIG. 10 is proposed in, for example, Patent document 1. To process wafers W by the resist pattern forming system shown in FIG. 10, a carrier 10 holding a plurality of wafers W is delivered to a carrier stage 11 included in a carrier block 1A, and then a transfer arm 12 takes our a wafer W from the carrier 10 and carries the wafer W to a processing block 1B. The wafer W is carried to a coating unit 13A included in the processing block 1B. The coating unit 13A forms a resist film on the wafer W. Then, the wafer W is carried through an interface block 1C to an exposure system 1D.
The wafer W processed by an exposure process is returned to the processing block 1B and is subjected to a developing process by a developing unit 13B. Then the wafer W is returned into the carrier 10. In FIG. 10, shelf units 14 (14a to 14c) are provided with a heating unit and a cooling unit for processing a wafer W by a heating process and a cooling process, respectively, before and after processes executed by the coating unit 13A and the developing unit 13B, and a transfer stage. A wafer W is carried by two carrying devices 15A and 15B placed in the processing block 1B to and from modules, on which the wafer is placed, in the coating unit 13A, the developing unit 13B and the shelf units 11a to 14c of the processing block 1B.
When a wafer W is processed by the foregoing processes, the wafer W is carried according to a carrying schedule that times operations for carrying the wafer to the processing units. The carrying schedule is designed to carry a wafer W sequentially to processing units for processing the wafer W before exposure by, for example, two carrying devices 15A and 15B, to deliver the wafer W to the interface block 1C, to receive the wafer W processed by the exposure process from the interface block 1C and to carry the wafer W sequentially to the processing units for carrying out processes to be carried out after the exposure process. Thus the carrying devices 15A and 15B move round the processing block 1B in one carrying cycle. Thus an unprocessed wafer W sent out from the carrier 10 is carried into the processing block 1B every one carrying cycle.
Patent document 1: JP-A 2004-193597
The carrying schedule specifies the order of the processing units in which each of the plurality of wafers W to be processed is carried sequentially to the processing units. If each processing unit or the plurality of processing units are provided with a plurality of modules of the same construction and capable of carrying out the same process, usually, it is not determined to carry a wafer W from which module to which module. For example, when a wafer W is to be carried from the coating unit 13A to the shelf units 14a to 14c, the sequence of carrying the wafer W to the plurality of modules for the film forming process and the heating process is not determined, because a wafer processed by a coating module is carried in a flexible carrying mode to the thermal modules. The flexible carrying mode carries the wafer sequentially to the plurality of inoperative thermal modules to operate the system at a high throughput.
When the wafer W is carried sequentially to the inoperative thermal modules by this flexible carrying mode, it is difficult to find out the coating module processed the wafer by the coating process when a defect, such as a defective film of an abnormal thickness, attributable to the coating process is found in the wafer W. Thus the known system has a technical problem in finding out a defective module. In some cases, the carrying arm needs to move long distances when wafers are carried in this flexible carrying mode and the carrying operation is inefficient when a large number of wafers are processed and throughput will drop.